#Cargolifter code wildstar serial
#Cargolifter code wildstar full

External clock and IRIG-B Support via Front Panel SMA.1 Gb Ethernet RJ45 connector for Remote Host Access.

#Cargolifter code wildstar full

Three or six optional built-in Front Panel QSFP+ Transceivers running at up to 56.4 Gbps each for 42.3 GB/s of Full Duplex Bandwidth.

Accepts Standard Annapolis WILDSTAR Mezzanine Cards, including a wide variety of WILDSTAR ADC and DAC Mezzanine Cards.

Backplane Protocol Agnostic connections support 10/40Gb Ethernet, SDR/DDR/QDR Infiniband, AnnapMicro protocol and user designed protocols.

Two PCIe Gen3 8x Connections to VPX Expansion Plane (P2).

#Cargolifter code wildstar serial

Up to 16x High Speed Serial FPGA connections to P5.16x High Speed Serial IO lanes to VPX Data Plane (P1) for 20 GB/s of Full Duplex Bandwidth.PCIe Gen3 8x from each FPGA to on-board PCIe switch.Up to 96 MB of QDRII+ SRAM for 48 GB/s of SRAM bandwidth.Up to 8 GB of DDR3 DRAM for 51.2 GB/s of DRAM bandwidth.Up to three Intel Stratix® V FPGA Processing Elements: 5SGSD6, 5SGSD8, 5SGXA7, 5SGXA9, 5SGXAB.Review other OpenVPX 6U and Intel FPGA boards. RTM HSS is also capable of 10Gbps signalling and supports multiple channels of 40GbE. There are also plenty of user backplane signals available on the Annapolis 6U Rear Transition Module (RTM) such as LVDS, FPGA HSS, IRIG, Ethernet and clocking. It is connected to the OpenVPX control plane via 1GbE. It is also used query board health like FPGA temperature and power. This also has a connection to PCIe infrastructure (which includes FPGAs) and can be used by customers for application requirements. This feature is unique to Annapolis and was developed because our experience with OpenVPX systems has shown it invaluable so a whole chassis does not need to be shutdown to remove a single board.Īnnapolis OpenVPX FPGA cards include an on-board dual core 1.2 GHz PowerPC. WILDSTAR A5 and V7 FPGA boards are hot swappable allowing for more system reliability. Some configurations utilize a second slot (for example the QSFP+ option and WILDSTAR Mezzanine card used in a single IO Site). These options can be mix and matched to meet customer needs. Each 6U card has 2 mezzanine IO sites which can support up to 4 WILDSTAR™ Mezzanine cards as well as a QSFP+ option (on WS7 and WS A5 board) that allows for 6 QSFP+ transceivers per slot. If IO is required, Annapolis offers extraordinary density, bandwidth and analog conversion choices. When using 40GBASE-KR, there is the added reliability of Forward Error Correction (FEC) to achieve a much lower Bit Error Rate (BER). In addition, there is 16 GB/s of PCI Express Gen 3 bandwidth on the VPX Expansion Plane with an 8x Gen3 connection to each FPGA through a non-blocking PCIe switch. With included High Speed Serial (HSS) FPGA cores (including 40GBASE-KR), there is up 20 GB/s of bandwidth on the VPX data plane which can go directly to other VPX cards or to a switch, depending on backplane topology. The IO Processing Element (IOPE) FPGA has four 32-bit DDR3 DRAM ports clocked at up to 800 MHz. On each Compute Processing Element (CPE) FPGA there is six 72-bit QDRII+ SRAM interfaces clocked up to 550 MHz. These FPGA boards include 3 Intel Stratix V FPGAs with 48 High Speed Serial connections performing up to 14.1 Gbps.